Design Verification of the S3.mp Cache-Coherent Shared Memory System
Journal Article, IEEE Transactions on Computers, Vol. 47, No. 1, pp. 135 - 140, 1998
Abstract
This paper describes the methods used to formulate and validate the memory subsystem of the cache-coherent Sun Scalable Shared-memory MultiProcessor (S3.mp) at three levels of abstraction: the memory consistency model, the cache coherence protocol, and the implementation.
BibTeX
@article{Pong-1998-14571,author = {F. Pong and M. Browne and G. Aybay and Andreas Nowatzyk and M. Dubois},
title = {Design Verification of the S3.mp Cache-Coherent Shared Memory System},
journal = {IEEE Transactions on Computers},
year = {1998},
month = {January},
volume = {47},
number = {1},
pages = {135 - 140},
}
Copyright notice: This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. These works may not be reposted without the explicit permission of the copyright holder.