Evaluation of the Intel iWarp Parallel Processor for Space Flight Applications - Robotics Institute Carnegie Mellon University

Evaluation of the Intel iWarp Parallel Processor for Space Flight Applications

Butler Hine and Terrence W. Fong
Conference Paper, Proceedings of AIAA/AHS/ASEE Aerospace Design Conference, No. 1133, February, 1993

Abstract

The potential of a DARPA-sponsored advanced processor, the Intel iWarp, for use in future SSF Data Management Systems (DMS) upgrades is evaluated through integration into the Ames DMS testbed and applications testing. The iWarp is a distributed, parallel computing system well suited for high performance computing applications such as matrix operations and image processing. The system architecture is modular, supports systolic and message-based computation, and is capable of providing massive computational power in a low-cost, low-power package. As a consequence, the iWarp offers significant potential for advanced space-based computing. This research seeks to determine the iWarp's suitability as a processing device for space missions. In particular, the project focuses on evaluating the ease of integrating the iWarp into the SSF DMS baseline architecture and the iWarp's ability to support computationally stressing applications representative of SSF tasks.

BibTeX

@conference{Hine-1993-13453,
author = {Butler Hine and Terrence W. Fong},
title = {Evaluation of the Intel iWarp Parallel Processor for Space Flight Applications},
booktitle = {Proceedings of AIAA/AHS/ASEE Aerospace Design Conference},
year = {1993},
month = {February},
keywords = {parallel processing},
}